CVE-2020-0574

Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to potentially enable escalation of privilege and information disclosure via physical access.
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Configurations

Configuration 1 (hide)

AND
cpe:2.3:o:intel:max_10_fpga_firmware:*:*:*:*:*:*:*:*
cpe:2.3:h:intel:max_10_fpga:-:*:*:*:*:*:*:*

Information

Published : 2020-03-12 14:15

Updated : 2021-07-21 04:39


NVD link : CVE-2020-0574

Mitre link : CVE-2020-0574


JSON object : View

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Products Affected

intel

  • max_10_fpga_firmware
  • max_10_fpga